1. Field
Embodiments relate to methods of fabricating semiconductor devices. More particularly, embodiments relate to methods of fabricating semiconductor devices in which a tungsten contact plug is processed by rapid thermal annealing (RTA) in an oxygen atmosphere to remove a partial step.
2. Description of Related Art
Today's rapidly developing information-oriented society demands semiconductor devices having high data transmission rates that can rapidly process large amounts of information. To increase the data transmission rate of a semiconductor device, design rules of semiconductor devices are being gradually reduced in order to integrate more and more cells on each single chip.
That is, to form more and more patterns on a semiconductor substrate, pattern intervals and widths are being reduced. Patterns having a narrow width may be formed in multiple layers, and an interlayer insulating layer is formed to electrically insulate the patterns in the respective layers from each other. In the interlayer insulating layer, contacts and vias are formed to electrically connect the patterns in the respective layers. The contacts or vias are formed by forming predetermined openings in the interlayer insulating layer and filling the openings with a conductive material. Thus, to form the contacts and vias in a desired region only, the interlayer insulating layer should be densely and uniformly formed without an inner void.
That is, the interlayer insulating layer should be formed such that a space between the patterns formed in the respective layers is densely filled with the conductive material. However, as design rules are reduced, aspect ratios of the patterns generally increase. Thus, when a space between the patterns having higher aspect ratios is filled with the conductive material, the narrow space is not completely filled with the conductive material, and an empty space, i.e., a void, is formed.
More particularly, a metal contact plug of a semiconductor device may be formed by sputtering aluminum (Al). However, when the aspect ratio is high, it is difficult to ensure the step coverage of such an aluminum contact. Further, high density plasma enhanced chemical vapor deposition (HDPCVD) may be used as a gap-filling method when the aspect ratio is high. However, even when the HDPCVD method is used, a void or seam is still formed, e.g., for a design rule of a critical dimension (CD) of 0.2 μm or less. Consequently, a poor contact may result.